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Clock skew is a condition in which a clock signal arrives at different components at different times.

CMOS Logic has lowest power dissipation.

The use of Schottky transistors in TTL is primarily to reduce propagation delay. Darlington pair formed by the transistors provides high current gain. Transistor instead of emitter resistor turns off current spikes.

There are 4 channels each with 16 bit address and 14 bit counter.
The 8257 DMA controller is designed to support up to 4 I/O devices.
It can manage data transfers between these I/O devices and memory independently, freeing up the CPU from performing these tasks and improving the overall efficiency of data movement within the system.

There are 256 interrupts available in 80286 each occupying 4 bytes. Hence 1024 bytes ( = 1 kB ) of memory needs to reserved for interrupts

8051 is based on Harvard Architecture.
It has separate memory areas for data & code.
It is possible to access program memory and data memory simultaneously.

PSW ( Processor Status Word ) stores important status conditions in 8051.
It is also known as flag register.
It is an 8-bit register.
Only 6 bits of it are used by the 8051,the two unused bits are user-definable flags
Four of the flags are called conditional flags, they indicate condition which results after an instruction is executed.

When configured as input, Port 0 get tristated .

CLC – Clear Carry Flag
CLI – Clear Interrupt Enable Flag
CLD – Clear Direction Flag

Instruction Stream queue in Bus Interface Unit permits the prefetch of maximum 6 bytes of instruction code. 6 bytes marks the length of longest instruction in 8086.

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